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Renesas Electronics /R7FA6M1AD /SYSTEM /SCKDIVCR2

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Interpret as SCKDIVCR2

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7 43 0 0 00 0 0 0 0 0 0 0 0 (others)UCK

UCK=others

Description

System Clock Division Control Register 2

Fields

UCK

USB Clock (UCLK) Select

0 (others): Setting prohibited

2 (010): /3

3 (011): /4

4 (100): /5

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data